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aml8 6 13 a/v processor user guide version 0.41 12/18/08 1/25 amlogic proprietary aml 8613 a/v processor users guide amlogic, inc. 3930 freedom circle santa clara, ca 95054 u.s.a. www.amlogic.com amlogic reserves the right to change any informatio n described herein at any time without notice. amlogic assumes no responsibility or liability from use of such information. www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 2/25 amlogic proprietary table of contents 1. introduction ....................................... ................................................... ......... 4 2. features........................................... ................................................... ........... 5 3. architecture overview.............................. ................................................... . 8 3.1 architecture ....................................... ................................................... ............................8 3.2 video/picture processing........................... ................................................... ....................8 3.3 audio processing................................... ................................................... ...................... 10 3.4 peripherals interface architecture ................. ................................................... ............... 11 3.5 host cpu and system architecture ................... ................................................... .......... 11 4. external interfaces................................ ................................................... ... 13 4.1 global configurations .............................. ................................................... .................... 13 4.2 memory interfaces.................................. ................................................... ..................... 15 4.3 audio interfaces................................... ................................................... ........................ 16 4.4 video output interfaces............................ ................................................... ................... 17 4.5 peripherals........................................ ................................................... .......................... 18 5. operating conditions ............................... .................................................. 19 1919 19 5.1 dc characteristics ................................. ................................................... ..................... 19 5.2 absolute maximum ratings ........................... ................................................... .............. 19 5.3 recommended operating conditions............ ................................................... .............. 19 6. pin out ............................................ ................................................... .......... 19 6.1 pin-out information................................ ................................................... ................... 20 7. pin-out diagram................................. ................................................... ...... 24 8. mechanical specifications ....................... .................................................. 2 5 www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 3/25 amlogic proprietary revision history revision number revised date by changes 0.1 may 28,2008 jesse w initial version 0.2 oct 15, 2008 ql tu revision 0. 3 nov 11, 2008 julius z revision 0 .4 nov 13, 2008 ql tu revision 0 .41 dec 12, 2008 ql tu modify reset config(remove m2), change max sdram to 32mb www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 4/25 amlogic proprietary 1. introduction the AML8613 a/v processor is a complete integrated system targeting media box (mbx) backend applications. the AML8613 device includes a 333 mh z embedded risc cpu, a/v decoders, crypto- engine, transport interface, smartcard interface an d usb for the mbx applications. the AML8613 firmware provides all a/v decoding functions, and u sb stacks. the AML8613 combines full function of mpeg-1, mpeg- 2, mpeg-4 and real-video decoding, numerous dedicated and general-purpose peripherals, and a hi gh speed 32-bit host cpu in a single device. the AML8613 has two built-in amrisc tm risc processors with special instructions to accomm odate audio and video digital signal processing. the AML8613 d evice provides many on-chip i/o peripherals. the peripherals include one usb 2.0 high-speed otg cont rollers and phys; a memory card reader controller. the embedded 32-bit core cpu controls all system re lated application software. it executes avos, the base operating system for AML8613. all application s and drivers run on top of avos. drivers including mbx processing, smartcard driver, usb dri vers and other hardware related programming interfaces are provided by avos. applications incl uding, graphical user interfaces, on-screen display s (osd), and file system sub-system are also included in avos. developers can add additional applications to customize avos for each unique prod uct platform. the core cpu interfaces to the video and audio proc essing hardware. mpeg1/2/4, hvd/evd, real- video and jpeg/m-jpeg streams are processed by dedi cated video decoding hardware and the flexible video amrisc tm engine. the hardware and microcode combination i s capable of decoding normal d1 size video sequence at full speed, and jpeg picture s with no limits. pixel based de-interlacing is applied to the video sequence for high quality vide o output. once decoded, the output pictures are passed to a s ophisticated video sub-system that performs video enhancement and scaling functions. contrast enhanc ement, hue adjustment, video scaling, video interpolation, pan-scan, letter-box, and zoom are a lso supported. the scalar supports both up-scaling and down-scaling of images and video. the scalar c an also mix in multiple graphics and osd layers for the final display. the integrated audio amrisc tm risc processor performs advanced digital audio dec oding and post- processing. the micro-coded engine provides suppor t for all existing audio formats and it also has enough flexibility to accommodate new audio standar ds. popular audio formats like mpeg, lpcm, dolby ac-3 5.1, hdcd, mp-3, wma, aac, real-audio ca n be supported. in addition, spdif (iec958) outputs are supported. the AML8613 also integrated one usb 2.0 high speed otg controllers and phys for connecting to usb hard disk, flash memory, digital cameras and mp3 pl ayers. the avos drivers and applications for AML8613 firmware includes the basic usb device driv er, usb protocol stacks to support bulk and intr transfer, hub, mass-storage (ms) class, picture tra nsfer protocol (ptp) and pictbridge protocol. the avos usb firmware also supports multiple file syste ms and includes flexible file transfer functions between usb devices. the AML8613 supports all popular memory card format s and protocols. for example, secure digital cards (sd/sdhc), sony memory stick (ms), mmc. AML8613 a/v processor has a set of very flexible cl ocking circuits that implement the adaptive ampower-ii power reduction algorithms. the chip wo rks in conjunction with the avos software to reduce total power consumption based on processing load, type of media streams being processed and the output requirements. with ampower-ii, the syst em can reduce power consumption for portable applications and helps consumer electronics to achi eve the energy star rating. in addition, ampower- ii also provides higher performance within smaller, thermally constrained environments. www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 5/25 amlogic proprietary 2. features the AML8613 chip is very flexible and most of the c apabilities are under firmware control. the follow ing list of features may or may not be included in the firmware library or binary, depending on the actual application and platform. high integration embedded 32-bit core risc processor for system con trol complete realvideo, mpeg 1/2/4 decoding backend an d video post processing logic complete audio decoding backend integrated one usb 2.0 high speed otg ports integrated card reader controllers integrated tv encoder and triple video dacs realvideo decoding realvideo decoding engine controlled by a dedicate d video amrisc tm processor decodes realvideo-8/9/10 video streams *.rm and *.rmvb file formats can be handled by avo s mpeg 1/2 decoding mpeg video engine controlled by a dedicated video amrisc tm processor mpeg-2 ml/mp conforming to iso-13818 mpeg-1 ml/mp conforming to iso-11172 sub-picture and highlight decoding and display advanced error detection, concealment, and recover y scheme *.mpg, *.mpeg, *.dat, and *.avi file formats can b e handled by avos and cpu subsystems mpeg 4 decoding mpeg-4 asp and xvid compliant gmc and q-pel multiple language and multiple formats divx sub-ti tle support *.avi file formats can be handled by avos and cpu subsystems jpeg/m-jpeg decoding super fast hardware decoding of jpeg picture unlimited pixel resolution (currently test with 16 m pixel pictures) supports scaling (zoom in or out), rotation and tr ansition effects m-jpeg engine supports up to full frame rate (30 f ps) quality movies other images/pictures decoding decodes bmp, png, gif, tiff and other popular pict ure formats supports zoom in and out, rotation and transition effects zoom supported in 2x mode video processing 3:2 pull-down for 24 fps displaying at 30 fps0 2:2 pull-down for 24 fps displaying at 25 fps adaptive pixel-based de-interlacing algorithm variable steps video zooming (up to 8x) letterbox and pan/scan built-in ntsc to pal scaling or vice-versa 1st on-screen-display (osd1) capable of supporting 4/16/256/16k colors or true-color osd alpha-blending over video display 2nd osd supporting 16 colors (osd2). global alpha for osd1/osd2 www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 6/25 amlogic proprietary tv encoder interlaced ntsc output 720x480 at 30 fps, with mac rovision 7.1l1 anti-taping interlaced pal output 720x576 at 25 fps, with macr ovision 7.1l1 anti-taping progressive ntsc output 480p at 60 fps, with macro vision 1.03 anti-taping progressive pal output 576p at 50 fps, with macrov ision 1.03 anti-taping high definition output of 720p component, composite(y/pb/pr, yuv) output closed caption modulation in the vertical blanking intervals programmable tint, brightness and other tv enhance ments graphics graphics can be scaled independently of the video output unified mpeg video and graphics memory architectur e for maximum flexibility and system cost savings audio decoding built-in audio amrisc tm processor with extensions specifically designed fo r audio processing on-the-fly switching of audio streams during playb ack full realaudio decoding full mpeg audio layers i, ii and iii compliant with dolby ac-3 5.1 channel decoding hdcd support capable of decoding many audio formats including: mp3, wma, wav, ogg vorbis, aac. audio post processing and output integrated a 2-channel delta-sigma audio dac for l ow cost system configuration. two channels analog output or 8 channels linear pc m output. i 2 s or eiaj dac-compatible iec958 (s/pdif) digital output dts audio pass-through ac-3 two channels down-mixing virtual surround sound to create 3-d spatial sound field from two audio channels prologic ii to convert stereo audio source to mult i-channel audio output full speaker configurations and bass management wi th adjustable crossover settings muting, volume control, etc. usb interface integrated one otg 2.0 high speed controllers and phys backward compatible with usb 1.1 devices usb port can be configured as usb device, host or otg port dma support for data movement for bulk, intr and i so transfer usb device driver, native usb protocol stack suppo rted in avos firmware integrated support for mass-storage class (ms-clas s), picture transfer protocol (ptp), pictbridge protocol and usb communication class usb hub support video, audio and image decoding from usb attached ms-class or ptp devices photo printing to usb attached pictbridge devices connecting to pcs or apple computers as usb ms-cla ss devices card reader interfaces and controllers supports ms, sd/sdhc, and mmc memory card formats supports reading and play back of audio, picture a nd video multimedia files avos software supports all file operations via fil e system on each memory card core cpu sub-system high speed 333mhz 32-bit core cpu dedicated for us er applications embedded debug interface using ice/jtag shared mpeg sdram as run time data storage for min imal system cost www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 7/25 amlogic proprietary integrated interrupt controller, general purpose t imers and counters integrated general purpose dma controllers supports 8-bit or 16-bit nand or 4 wire spi nor fl ash support for mlc nand flash with 9-bits of ecc sdram interface can support up to 32m bytes of sdr am system, peripherals and misc. interfaces single 27 mhz crystal oscillator input ampower-ii power reduction algorithm for portable devices numerous programmable gpio pins for system control and interrupts integrated i2c slave and master controllers, enhanced uart controller remote control input circuit with digital input fi lter pwm output pins 1.2 volt and 3.3 volt power supplies 3.3 volt i/o support 144 pins lqfp rohs package www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 8/25 amlogic proprietary 3. architecture overview 3.1 architecture the AML8613 is a highly integrated soc device that provides cost-effective solutions for media players , media boxes, and integrated entertainment centers. since the device is very sophisticated, the follow ing discussion is divided into multiple areas: back-en d mpeg decoders, audio decoders, output stages, i/o interfaces like usb, card-readers, nand, etc. 3.2 video/picture processing the decoder architecture is optimized for audio and video streaming applications. with the architectu re separation of the application specific interface (e .g. usb file system), and the output stage, the dec oders can be used in a large variety of applications. th e decoder utilizes external sdram for input video, photo, audio, sub-pictures, navigation, osd data bu ffers, and decoded frame buffers. 3.2.1 a/v stream parser the a/v stream parser is a programmable engine that works in conjunction with the video amrisc tm processor for the following functions: accepts audio/video bit stream as the input performs decryption and unscrambling for encrypted bit streams de-multiplexes the bit streams into multiple buffe rs, like encoded video, audio, sub-pictures, and navigation information audio amrisc video amrisc audio decoder mpeg1/2/4 real decoder stream parser audio post- processor tv/motion enhancement & video post-processor tv encoder audio i 2 s interface or ? dac iec958 /spdif interface 300mhz + core cpu usb 2.0 hs otg nand/spi/dram flash controller jtag, gpio, pwm, i2c, pll image enhancement jpeg/ m-jpeg decoder sd/ms/mmc controller www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 9/25 amlogic proprietary deposits the parsed data into the sdram controls the buffer level of the audio decoding co re and video decoding core a/v sync handling once the stream is decrypted, the parser searches f or stream ids within the stream, looking for the correct video, audio or other data to extract. the extracted data is stored into multiple buffers in the system sdram. all buffer sizes and locations are p rogrammable depending on the application 3.2.2 realvideo, mpeg 1/2/4 video decoder the mpeg decoder works in conjunction with the vide o amrisc tm processor for the following functions: realvideo 8/9/10 decoding mpeg 1/2/4 decoding adaptive pixel-based de-interlacing (including 3:2 pull-down detection) frame rate conversion (3:2 pull-down, 2:2 pull-dow n, 50/60hz conversion and any combination conversion) the mpeg decoder performs all necessary mpeg video streams decoding logic for mpeg-1, mpeg-2 and mpeg-4 asp. that includes vld decoding, iq, id ct, motion vector parsing, motion compensation, block predication and picture reconstruction. mult iple decoded pictures are placed in the frame buffe rs in sdram. frame buffers are used to store i (intra coded pictures), p (predicted pictures) and b (bi- directionally predicted) pictures. the video post- processor pulls decoded pictures for display purpos es. the realvideo decoder decodes realvideo 8/9/10 form atted movies. a dedicated realvideo loop filter is added especially for real processing. in addition to the traditional realvideo, mpeg proc essing, the mpeg decoder performs adaptive pixel- based de-interlacing and 3:2 pull-down detection/re versal to improve output picture quality for progre ssive displays. 3.2.3 jpeg/m-jpeg picture/movie decoder the mpeg decoder can decode picture formats like jp eg and motion jpeg (m-jpeg). both jpeg (*.jpg) and m-jpeg (*.avi) are popular formats used by digital cameras. jpeg is used as the still pict ure format. m-jpeg is used as the video capture format . the video decoder will read and decode the jpeg pic ture and scale the decoded output to the proper size to store in memory for display purpose. since the mpeg processor has a streaming interface, ther e is no size limitation of the original compressed jp eg picture. the mpeg decoder can also process motion jpeg seque nce. it is capable of supporting vga resolution mjpeg streams at 30 frames-per-second. m-jpeg streams can be rotated or flip (to adjust for customers using digital camera to film home vid eo) in real-time while being displayed. 3.2.4 video post-processor the video post-processor (vpp) performs functions r elated to combining and scaling multiple video, graphics, osd and sub-pictures video planes. the v ideo post processor fetches data from each image plane (e.g. decoded video frames), performs sophist icated multi-taps filtering/scaling to generate a n ew pixel for output, and combines the result with othe r filtered data to generate the final video image. the video post-processor is capable of performing alpha -bending between multiple image planes. the vpp is capable of both scaling up (zoom in) and scaling down (zoom out). 3.2.5 video encoder, video dac and digital video ou tput the AML8613 device contains a video encoder that ca n handle both progressive and interlace video output. in addition to the analog video dac output interface, the video encoders ttl output module www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 10/25 amlogic proprietary also generates high-definition digital video signal s for external transmitter devices. the following is the basic features of the AML8613 internal tv encoder: output capability 576p/720p ntsc and pal output (including progressive 480 and 576 outputs and scart) the video encoder also provides many video adjustme nt options. the video encoder has luma and chroma bandwidth control, programmable saturation, hue, contrast, black level and brightness adjustments. the video encoders generate up to three video outpu t streams to the built-in high performance video dacs. the video dac outputs are fully programmable to support composite video, component video (yuv), ypbpr. also, simultaneous progressive and in terlace modes are also supported. 3.3 audio processing 3.3.1 audio decoding and post-processing the audio processing architecture is based on the a udio amrisc tm processor with direct hardware assist functions from the audio decoder hardware. since t he audio amrisc tm processor is a micro-coded engine, the AML8613 device is capable of supporting the decoding of all existing audio formats (pcm, dolby ac-3 5.1, mpeg layer i/ii/iii, wma, mp3, aac, realaudio, ogg vobris) and can be programmed to support customer specific audio requirements. t he audio amrisc tm processor has its own internal code/data ram/rom for supporting the high frequency requirements (e.g. 320kbps for mp3) for realistic sound reproduction. in addition to supporting multiple audio formats, t he AML8613 device implements many different audio post-processing algorithms. post processing algori thms are used to optimize the audio output for a specific speakers capabilities, and to personalize the audio set up for individuals. post-processing algorithms supported included: dolby prologic ii, dolby prologic iix, or dolby di gital ex down-mixing 5.1 channels to two audio channels virtual surround sound effect for 2-channel audio output dsp effects (e.g. concert hall, party, etc.) equalizer effects (e.g. rock, dance, techno, jazz, classical, live, movie, etc.) full speaker settings and bass management audio channel delay gain control dc filtering depending on the specific application, one or more post-processing modes can be enabled by firmware. 3.3.2 audio interfaces the audio output is implemented via three independe nt interfaces: i 2 s, iec-958 (s/pdif) and delta-sigma audio dacs. the iec958 (s/pdif) audio interface ca n outputs a decoded stream or just a pass-through stream from the source (e.g. dts stream from a dvd- video disc). the iec958 interface can be used for both digital out and optical out signals. in addition to the digital outputs, the AML8613 chi p includes two ? audio dacs for low-cost stereo output. ? modulation method is used to generate an internal pwm signal, and then the pwm signal is passed to a pair of multi-stage audio filters for o utput processing. the audio dac can drive rca connection directly, or it needs a simple amplifier to driver speakers. www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 11/25 amlogic proprietary 3.4 peripherals interface architecture the AML8613 a/v processor can be connected to a var iety of peripherals, including usb otg, card reader interfaces. 3.4.1 usb interfaces the AML8613 a/v processor has one built-in usb otg controller and phy. the otg is capable of high-speed (480mbps) data transfer between external usb host/devices and internal sdram. it has built-in dma engines to handle data transfer with m inimal core cpu processing. the avos firmware for AML8613 provides the necessar y driver for handling the usb otg ports. when behaving as an usb host port, the AML8613 can be co nnected to any external mass-storage class usb devices or picture-transfer-protocol (ptp) class us b devices. the usb otg port can be connected to any pcs or macs usb port for file transfer. the AML8613 a/v processors internal core processor is used to perform higher-level usb protocols, and new functions are being added. please contact amlogic sales team for more up-to-date information about new additions to the usb protocol stack. 3.4.2card reader interfaces the AML8613 processor also integrates multiple flas h memory card controllers and a flexible programmable card controller for interfacing with v aries flash card standards. current firmware can support sd/ms/mmc card standards. the avos firmwar e includes device drivers for the card reader controllers and the upper layer file-system drivers . 3.5 host cpu and system architecture 3.5.1 embedded host cpu a 333mhz internal (core) risc cpu is embedded in th e AML8613 a/v processor. the processor is a 32-bit risc cpu with i+d cache structure and mmu. the program can be run from the flash or sdram interface. data, bss and stack are stored in the sdram. the internal risc performs general house keeping functions, user interface and graphic programming and usb protocol stacks. the risc cpu has a side dsp engine with flexible alu and mac to accelerate computation intensive tasks. 3.5.2 memory interfaces the AML8613 a/v processor provides two memory inter faces: sdram interface and flash interface. the flash interface is meant for external storage o f executable binaries and graphics on flash memory chips. the 4 wire spi nor flash interface a ccommodates up to 64m bits of flash storage. the 8/16-bits nand flash interface can accommodate more than 1g bytes of storage. the AML8613 can boot from either nor flash or nand flash. the internal flash controller has built-in state- machines to work with either types of flash and inc ludes all the ecc calculation and dma mechanism for effective transfer of data between sdram and fl ash devices. the AML8613 also supports mlc nand flash. the system sdram is used as program memory for the internal risc processor and the a/v decoder core. it can accommodate up to 32m bytes of sdram. in order to optimize the sdram memory access, the sdram interface module has specific extensions to stream parser, a/v decoding core, video/audio post processors, core risc processor, dma engines, usb otgs and peripheral interfaces. sophisticated prioritized time sharing algorithm is used arbitrate the sdram access between all the internal modules. www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 12/25 amlogic proprietary 3.5.3 clock and power supplies the AML8613 processor requires one crystal oscillat ors. one 27mhz external crystal oscillator is used as clock input for the system and decoding operatio n. it has multiple internal clock circuits (plls) to drive all the clocks needed. the AML8613 device uses 1.2v as its core logic volt age and uses 3.3v power supplies for i/o. the analog devices (pll, otg phy and vdac) need to have isolated/filtered power/ground supplies as specified by in the pin list. the AML8613 device and firmware implement the ampow er-ii algorithm to reduce power consumption for portable applications and to reduce heat genera tion for traditional a/v applications. depending o n the application, the system dynamically enables/dis ables clocking on each module and varies its operating frequency between 27mhz and 166mhz to opt imize the system performance. in addition, the system intelligently turns on/off different subsyst ems to conserve power consumption. www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 13/25 amlogic proprietary 4. external interfaces 4.1.1 reset configuration the chip has a common active-low reset signal calle d reset_n . this signal puts the entire chip into a known state by resetting internal registers and sta te-machines to their default states. typically thi s signal is held low for at least 100 millisecond aft er the power is applied and has stabilized. the re set process also plays a role in configuring certain fu nctions within the chip. using the state of the a udio pins and the rising edge of the reset_n signal, the user can dictate the configuration of the dram controller and the boot address in shared flash con figurations. the audio pins should be pulled up or down using 10k resistors to either 3.3v or ground. pin function m1_a_11 spi boot location: if this bit is set to 1, then th e spi flash is connected to m1_d[3:0]. if this bit is set to 0, then the spi b oots from the nand pins: gpioa_13, nand_we_n, nand_rdy_bsy, nand_ce_n, nand_rd_n m1_cas_n nand flash page size configuration: this pin contr ols the page size of the nand flash. tie to 3.3v with 10k resistor when the nand flash h as a 2048 bytes page size. tie to ground with a 10k resistor for nand flash th at has 512 bytes page size. m1_ras_n nand flash siz e configuration: this pin controls the number of a le pulses for controlling the nand flash. tie to 3.3v with 10k resistor when 3 ale pulses are needed to set the nand row address. this is usually needed for larger size na nd flash chips. tie to ground wit h a 10k resistor when 2 ale pulses are needed to se t the nand row address. m1_we_n boot option configuration: this pin controls if th e chip is booting from nand or nor flash. tie to 3.3v with 10k resistor to select nand boot. tie to ground with a 10k resistor to select nor boo t. m1_a_10 jtag configuration: this pin controls the jtag con figuration after reset: tie to 3.3v with 10k resistor indicates the jtag pi ns are used for communicating with cpu tie to ground with a 10k resistor to use the jtag p ins as gpio m1_ba1 tie to 3.3v with 10k resistor m1_ba0 nand flash location configuration: this pin control s the location of nand flash chip for booting. note the nand flash can on ly boot from sdram1. tie to 3.3v with 10k resistor indicates nand flash is connected to m1_* pins m1_dqm1 tie to 3.3v with 10k resistor for 16-bit nand flash interface tie to ground with a 10k resistor for 8-bit nand fl ash device interface www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 14/25 amlogic proprietary example: the following example illustrates a start-up config uration for a single 8m bytes sdram1 and 8-bit flas h memory during a production environment (i.e. no jta g debugging). 4.1.2 clocks the AML8613 has multiple internal clock domains, bu t all the internal clock domains are derived from a single external reference: osc . as illustrated below, the crystal/oscillator pin pairs (oscin/oscout) can be connected to a crystal or driven from an ext ernal oscillator. in the typical a/v application, a 27 mhz crystal is connected to the osc pins. the following diagram depicts a typical cry stal circuit; the actual values of the components depend on the type of crystal used in the application. 4.1.3 jtag for software development the embedded core processor can be controlled throu gh its jtag port using the embedded ice interface. the embedded ice interface allows the developer to download code/data to the sdram memory, probe registers on the AML8613 chip, execute and debug th e risc code using a user friendly development environment. the jtag interface is enabled by tyin g aoclk high as illustrated below. tdi tms tck tdo vcc aoclk tdi tms tck tdo jtag controller oscin oscout 22pf 22pf xtal 27 mhz oscin oscout nc 27mhz 100k audio processor sdram (4mx16) 8-bit flash flash controller sdram controller gnd 3.3v 3.3v gnd reset_n power applied t 0 audio out aoclk amclk adata_1 adata_0 m1_* www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 15/25 amlogic proprietary 4.1.4 gpios configurable hardware controllers (e.g. i2c, rs232, vfd, etc.) and dmas are integrated into the AML8613 device to speed up the common operations an d relieve the core risc for user-level applications. since hardware controllers and state -machines cannot cover all possible external device s or system-level signals, numerous general-purpose i /o pins are available on the chip for purpose like portable media player keypads. each gpio pin can b e independently configured to be an input or an output. as indicated in the diagram, there are var ious i/o types. 4.2 memory interfaces 4.2.1 sdram interface the AML8613 device uses external sdram for data sto rage and code execution. the sdram interface is labeled as m1_* interface. sdram interface can access up to 32m by tes of memory. depending on the application, either 133mhz or 166m hz sdram chips can be used. the following example depicts a system with only 8m bytes of sdra m on m1_* interface. read back register i/o gpio i/o type od - (pull-up required) i/o_en register read back register i/o gpio i/o type fc - (no pull-up required) i/o_en register i/o_o register read back register i gpio i/o type i o i2c_clk i/o_o register gpio pad types m1_d[0..15] m1_a[0..11] m1_ba1 m1_ba0 m1_clk0 m1_ras_n m1_cas_n m1_scs0_n m1_dqm0 m1_dqm1 m1_we_n d[0..15] a[0..10] ba1 ba0 clk ras# cas# cs# dqml dqmh we# 4m x 16 sdram www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 16/25 amlogic proprietary 4.2.2 nand flash interface the nand flash interface can accommodate an 8-bits or 16-bits nand flash device. due to the limited number of i/o pins, the flash interface is shared with the sdram (m1_*) interface. nand flash has a very large capacity that ranges from 32 mb to more than 1gb. the nand flash should be connected as indicated in the following diagram: 4.2.3 spi nor flash interface the spi nor flash interface can accommodate 1-bit, 2-bit and 4-bit spi nor flash devices. up to 8m bytes of nor flash is accessible with the spi fl ash interface design. the flash should be connected as indicated in the following diagram: 4.3 audio interfaces the audio output interface is composed of three ind ependent interfaces: i 2 s, iec-958 (s/pdif) and analog dac output. the iec958 audio output interface can send compress ed data or uncompressed pcm data to external audio device. for example, compressed audio data c an be sent to an external dolby/dts decoder, and uncompressed pcm data can be sent to a digital audi o recording device such as a dat or minidisk recorder. 8 - bit mlc nand flash r/b* re* ce* we* cle ale dq[7:0] nand_r/nb nand_nre nand_ce nand_nwe m1_ba1/nand_cle m1_ba0/nand_ale m1_d[7:0] 1 bit spi flash cs d q w spi_cs_n spi_d spi_q spi_w www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 17/25 amlogic proprietary two sigma-delta audio dacs are integrated into the AML8613 chip for low-cost audio solution. the two internal dacs can generate high quality stereo audi o output without any external dac chip. also, an analog audio filter is integrated for direct connec tion to rca jacks. the audio input pin is provided so that an external audio source such as a microphone can be digitized and mixed with other audio sources. 4.3.1 i 2 s audio output interface i 2 s output interface is used to communicate directly with audio dacs. the 16, 20 and 24-bit resolution dacs are supported. the pcm data can be configured to be either signed or offset binary with the msb first or last. the audio interface provides on-th e-fly control commands for l/r channel swap individually for each dac, stereo to mono conversio n, and individual speaker mute controls. 4.3.2 iec-958 / spdif audio output iec-958 is a consumer version of the aes/ebu-interf ace that supersedes aes/ebu, as well as s/pdif. the two formats are quite compatible with each othe r, differing only in the sub-code information and connector. iec-958 interface is designed to commun icate either to an external ac-3 decoder, or to a device that expects pcm data encoded over the iec-9 58 protocol standard interface. iec958 is supported using a single output pin. this output p in may be also used to drive a differential driver in cases where common mode rejection is required. 4.3.3 stereo audio dac output the AML8613 a/v processor implements two internal a udio dacs for stereo audio output. the audio dacs are designed for connecting to internal tv aud io sub-system or small speaker or ear buds for portable devices. a simple external filter amplifi er is needed. please see the following sample filt er diagram. internally, the delta-sigma algorithm is used to im prove the performance and ensure high snr output. the implementation includes a multi-tap interpolati on filter which increases the sample rate of the au dio channels to the modulator rate. then the audio str eam is passed through a sigma-delta modulator that generates the serial pwm data stream. an external analog filter is then used for out-of-band noise filtering and analog signal reconstruction. extern al amplifier is needed to provide the necessary cur rent to drive the speakers. connections to rca jacks do not need external amplifier chips. 4.4 video output interfaces 4.4.1 analog video output the AML8613 integrated internal video encoder and h igh resolution tri-video dacs for optimal analog video output. the video encoder is capable of both progressive and interlaced video output. the high frequency, high resolution video dac can support fr om ntsc video to 720p output frequency. adata_0 (l) adata_1 (r) ampifler circuit stereo adc cs5331 or equiv. l r www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 18/25 amlogic proprietary for the interlaced mode, the video encoder has luma and chroma bandwidth control, programmable saturation, hue, contrast and brightness and includ es macrovision 7.1 copy protection schemes. when configured for progressive scan output, the video d acs are programmed to output y, pb and pr with macrovision agc copy protection. the video dac outputs are fully programmable and su pport the following output format using composite video, and component y/pb/pr(yuv) video: progressive hdtv: 720px50/60fps, interlaced ntsc: 720x480x30fps interlaced pal: 720x576x25fps progressive ntsc: 720x480px60fps progressive pal: 720x576px50fps the video dacs use a standard doubly terminated sch eme as indicated below; depending on the application, different video output filters can be applied, please consult the amlogic sales staffs fo r more information. 4.5 peripherals card-reader interface the AML8613 have an integrated hardware controller for card-reader operations. the hardware controller is programmable so it can be extended to work with new memory card formats. the hardware controller is capable of executing the low-level ca rd interface protocols, computing the crc or checks um, and transferring data to/from sdram. the hardware provides interface for the necessary signals (e.g. sd_clk, sd_cmd, sd_d[0..3] for sd cards) but signal s like card detect and write-protect are provided using gpio only. 22pf 10pf 10pf 1.8uh 75 w tv encoder cvbs 480/576p 720p 0.01uf 262 w 3.3v vdac-comp vdac-rext vdac-vref 75 w 0.01uf x7r 10u tant. tv video filter values depend on the video mode selected www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 19/25 amlogic proprietary 5. operating conditions 5.1dc characteristics table 51 dc characteristics v dd = 3.3 +/- 0.3v, t a = 0 to 75 c symbol parameters condition min typ max unit v ih high level input 2.0 3.3 v v il low level input -0.3 0.8 v vt+ schmitt trigger, positive going threshold 1.5 vt - schmitt trigger, negative going threshold 0.93 v voh high-level output voltage ioh = -2.0ma to 24ma 2.4 v vol low-level output voltage iol = 2.0 ma to 24ma 0.4 v i ih high-level input current vin = v dd 10na 1 i il low-level input current 10na 1 ioz tri-state output leakage current 10na 1 ua p d power dissipation vin = v dd 0.8 w 5.2absolute maximum ratings the table below gives the absolute maximum ratings. exposure to stresses beyond those listed in this table may result in permanent device damage, unreli ability or both. table 52 absolute maximum ratings characteristic value unit 1.2v core supply voltage 1.5 v 3.3v pads supply voltage 3.8 v input voltage, v i -0.5 ~ 4.6 v output voltage, v o -0.5 ~ 4.6 v operating temperature 70 c 5.3recommended operating conditions table 53 recommended operating conditions symbol parameter min. typ. max unit v dd(core) 1.2v core supply voltage 1.00 1.2 1.5 v v dd(pads) 3.3v pads supply voltage 3.0 3.3 3.6 v t j junction temperature 0 125 c www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 20/25 amlogic proprietary 6 66 6 . pin-out 6.1 pin-out information the AML8613 a/v processor pin-out is described in t he following table. abbreviations: i == input digital pin o == output digital pin i/o == input/output pin ai == analog input pin ao == analog output pin aio == analog input/output pin p == power pin ap == analog power pin nc == no connection pin # package pin name gpio m1/jtag spi/i2c/audio/card nand/i2c uart 1 vdac-avd33b vdac-avd33b 2 vdac-dac_g vdac-dac_g 3 vdac-avd33 vdac-avd33g 4 vdac-avs33rgb vdac-avs3b 5 vdac-dac_r vdac-dac_r 6 vdac-avd33r vdac-avd33r 7 vdac-comp vdac-comp 8 vdac-rext vdac-rext 9 vdac-vrefin vdac- vrefin_out 10 vdac-avdd vdac-avdd 11 vdac-avss vdac-avss 12 aflr-avss 13 aflr-l 14 aflr-r 15 aflr-avdd 16 vdd12 17 nand_ce2 gpioa_13 nand_ce2_n 18 nand_we_n gpioa_14 nand_we_n 19 nand_rdy_bsy gpioa_15 nand_rdy_bsy 20 nand_ce_n gpioa_16 nand_ce_n 21 spi_cs_n spi_cs_n_a 22 spi_hold_n / nand_rd_n spi_hold_n_a nand_rd_n 23 vdd33 24 m1_d_0 / spi_c m1_d_0 spi_c_a nand_io_0 25 m1_d_1 / spi_d m1_d_1 spi_d_a nand_io_1 26 m1_d_2 / spi_q m1_d_2 spi_q_a nand_io_2 27 m1_d_3 / spi_a m1_d_3 spi_w_a nand_io_3 28 dvss 29 m1_d_4 m1_d_4 nand_io_4 30 m1_d_5 m1_d_5 nand_io_5 31 m1_d_6 m1_d_6 nand_io_6 www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 21/25 amlogic proprietary 32 m1_d_7 m1_d_7 nand_io_7 33 vdd33 34 m1_dqm0 m1_dqm0 35 m1_d_15 m1_d_15 nand_io_15 36 m1_d_14 m1_d_14 nand_io_14 37 vdd12 38 m1_d_13 m1_d_13 nand_io_13 39 m1_d_12 m1_d_12 nand_io_12 40 m1_d_11 m1_d_11 nand_io_11 41 m1_d_10 m1_d_10 nand_io_10 42 m1_d_9 m1_d_9 nand_io_9 43 m1_d_8 m1_d_8 nand_io_8 44 m1_dqm1 m1_dqm1 45 dvss 46 vdd33 47 m1_clk0 m1_clko 48 m1_a_12 m1_a_12 49 m1_a_11 m1_a_11 50 m1_a_9 m1_a_9 51 m1_a_8 m1_a_8 52 m1_a_7 m1_a_7 53 m1_a_6 m1_a_6 54 vdd12 55 m1_a_5 m1_a_5 56 m1_a_4 m1_a_4 57 vdd33 58 m1_we_n m1_we_n 59 m1_cas_n m1_cas_n 60 m1_ras_n m1_ras_n 61 m1_scs0_n m1_scs0_n 62 m1_ba0 m1_ba0 nand_ale 63 dvss 64 m1_ba1 m1_ba1 nand_cle 65 m1_a_10 m1_a_10 66 m1_a_0 m1_a_0 67 vdd33 68 m1_a_1 m1_a_1 69 m1_a_2 m1_a_2 70 m1_a_3 m1_a_3 71 gpiob_0 gpiob_0 72 dvss 73 usba_id usb 74 usba_vbus usb 75 usba_vdd33 usb 76 usba_dp usb 77 usba_dm usb 78 usba_vss33 usb 79 usba_txrtune usb 80 usba_vss33c usb 81 usba_vdd33 usb 82 pllc_avdd33 pll www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 22/25 amlogic proprietary 83 pllc_avss33 pll 84 pllb_avdd33 pll 85 pllb_avss33 pll 86 plla_avdd33 pll 87 plla_avss33 pll 88 oscin oscin 89 oscout oscout 90 reset_n 91 vdd12 92 remote gpioc_0 remote_in i2c_s_data uart_tx 93 spdif_out gpioc_1 spdif_out i2c_s_clk uart_rx 94 i2c_m_data gpioc_2 i2c_m_data i2c_s_data uart_tx 95 i2c_m_clk gpioc_3 i2c_m_clk i2c_s_clk uart_rx 96 vdd33 97 dvss 98 uart_tx gpioc_4 pwm_a i2c_m_data i2c_s_data uart _tx 99 uart_rx gpioc_5 pwm_b i2c_m_clk i2c_s_clk uart_r x 100 gpioc_6 gpioc_6 101 dvss 102 gpioc_15 gpioc_15 sd_clk 103 gpioc_16 gpioc_16 sd_cmd 104 vdd33 105 gpioc_17 gpioc_17 sd_d0 106 gpioc_18 gpioc_18 sd_d1 107 gpioc_19 gpioc_19 sd_d2 108 gpioc_20 gpioc_20 sd_d3 109 nc 110 nc 111 nc 112 nc 113 nc 114 dvss 115 nc 116 nc 117 nc 118 vdd33 119 nc 120 nc 121 nc 122 nc 123 dvss 124 vdd12 125 gpio_m2_31 gpio_m2_31 126 gpio_m2_30 gpio_m2_30 127 button_0 button_0 128 button_1 button_1 129 button_2 button_2 130 gpio_m2_26 gpio_m2_26 131 gpio_m2_16 gpio_m2_16 132 gpio_m2_17 gpio_m2_17 133 dvss www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 23/25 amlogic proprietary 134 gpio_m2_18 gpio_m2_18 135 gpio_m2_19 gpio_m2_19 136 vdd33 137 gpo_testn spdif 138 gpio_d0 139 gpio_d1 adata0 140 jtag_tms jtag_tms amclk 141 jtag_tdi jtag_tdi aoclk 142 jtag_tck jtag_tck alrclk 143 jtag_tdo jtag_tdo 144 vdac-dac_b vdac-dac_b www.datasheet.co.kr datasheet pdf - http://www..net/
ml8613 a/v processor user guide version 0.41 12/18/08 24/25 amlogic proprietary 7. pin-out diagram vdd12 m1_d_13 m1_d_12 m1_d_11 m1_d_10 m1_d_9 m1_d_8 m1_dqm1 dvss vdd33 m1_clk0 m1_a_12 m1_a_11 m1_a_9 m1_a_8 m1_a_7 m1_a_6 vdd12 m1_a_5 m1_a_4 vdd33 m1_we_n m1_cas_n m1_ras_n m1_scs0_n m1_ba0 dvss m 1_ba1 m1_a_10 m1_a_0 vdd33 m1_a_1 m1_a_2 m1_a_3 gpiob_0 dvss 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 vdac - dac_b jtag_tdo jtag_tck jtag_tdi jtag_tms gpio_d1 gpio_d0 gpo_testn vdd33 gpio_m2_19 gpio_m2_18 dvss gpio_m2_17 gpio_m2_16 gpio_m2_26 button_2 button_1 button_0 gpio_m2_30 gpio_m2_31 vdd12 dvss nc nc nc nc vdd33 nc nc nc dvss nc nc nc nc nc 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 sd_d3 sd_d2 sd_d1 sd_d0 vdd33 sd_cmd sd_clk dvss gpioc_6 uart_rx uart_tx dvss vdd33 i2c_m_clk i2c_m_data spdif_out remote vdd12 reset_n oscout oscin plla_avss33 plla_avdd33 pllb_avss33 pllb_avdd33 pllc_avss33 pllc_avdd33 usba_vdd33 usba_vss33c usba_txrtune usba_vss33 usba_dm usba_dp usba_vdd33 usba_vbus usba_id 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 6 0 61 62 63 64 65 66 67 68 69 70 71 72 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 AML8613 vdac - av d33b vdac-dac_g vdac-avd33 vdac-avs33rgb vdac-dac_r vdac-avd33r vdac-comp vdac-rext vdac-vrefin vdac-avdd vdac-avss aflr-avss aflr-l aflr-r aflr-avdd vdd12 nand_ce2 nand_we_n nand_rdy_bsy nand_ce_n spi_cs_n spi_hold_n / nand_rd_n vdd33 m1_d_0 / spi_c m1_d_1 / spi_d m1_d_2 / spi_q m1_d_3 / spi_a dvss m1_d_4 m1_d_5 m1_d_6 m1_d_7 vdd33 m1_dqm0 m1_d_15 m1_d_14 www.datasheet.co.kr datasheet pdf - http://www..net/
aml8 6 13 a/v processor user guide version 0.41 12/18/08 25/25 amlogic proprietary 8. mechanical specifications the AML8613 a/v processor is packaged using a 144 p in lqfp package. the mechanical dimensions are given in millimeters as below: 0.17/0.20/0.27 1.35/1.40/1.45 0.05/0.25 0.45/0.60/0.75 1.00 ref 22.00 0.25 20.00 0.10 22.00 0.25 20.00 0.10 0.50 amlogic AML8613 144 pin lqfp 20mmx20mm www.datasheet.co.kr datasheet pdf - http://www..net/

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